Research on key technologies of multi-core DSP in smart substation redundancy network testing
نویسندگان
چکیده
Abstract Aiming at the network characteristics of a smart substation redundant with complex communication messages, large amount interactive data, and high real-time performance, test model multiple submachines in High-Availability Seamless Redundancy (HSR) loop is analyzed. The requirements packet types, size, transmission speed are evaluated, hardware solution based on multi-core Digital Signal Processor (DSP) Parallel architecture FPGA designed. interaction strategy DSP software multi-port high-speed method proposed, inter-core (IPC) interrupts shared memory to achieve fast data migration between cores, Serial RapidIO (SRIO) complete message transmission. throughput, delay, loss rate, error frame detection functions realized, tested, verified, providing theoretical practical support for evaluation performance substations.
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ژورنال
عنوان ژورنال: Journal of physics
سال: 2023
ISSN: ['0022-3700', '1747-3721', '0368-3508', '1747-3713']
DOI: https://doi.org/10.1088/1742-6596/2427/1/012046